On Fri, May 17, 2024 at 11:21:54PM +0530, Kanak Shilledar wrote: > On Fri, May 17, 2024 at 9:34 PM Conor Dooley <conor@xxxxxxxxxx> wrote: > > On Fri, May 17, 2024 at 08:37:40PM +0530, Kanak Shilledar wrote: > > > +properties: > > > + compatible: > > > + const: "riscv,cpu-intc" > > > > A new warning with dtbs_check from your patch: > > /stuff/linux/build/arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: interrupt-controller: compatible:0: 'riscv,cpu-intc' was expected > > from schema $id: http://devicetree.org/schemas/interrupt-controller/riscv,cpu-intc.yaml# > > /stuff/linux/build/arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: interrupt-controller: compatible: ['andestech,cpu-intc', 'riscv,cpu-intc'] is too long > > from schema $id: http://devicetree.org/schemas/interrupt-controller/riscv,cpu-intc.yaml# > > > > There's a duplicate description in riscv/cpus.yaml: > > interrupt-controller: > > type: object > > additionalProperties: false > > description: Describes the CPU's local interrupt controller > > > > properties: > > '#interrupt-cells': > > const: 1 > > > > compatible: > > oneOf: > > - items: > > - const: andestech,cpu-intc > > - const: riscv,cpu-intc > > - const: riscv,cpu-intc > > > > interrupt-controller: true > > > > I think the one in cpus.yaml should be converted to a ref and the > > andestech compatible added here. > > I am working on the v2 patch, in which I didn't provide any ref to the > cpus.yaml and just replaced my compatible section with the one above > to resolve the issue with `/renesas/r9a07g043f01-smarc.dtb`. I tested > with others and didn't get any warnings. Please don't do that, we shouldn't have two different places that each are defining compatibles etc for the hardware. Thanks, Conor.
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