Introduce reset capability to scuclk clock-controller device-tree node
for EN7581 SoC.
Tested-by: Zhengping Zhang <zhengping.zhang@xxxxxxxxxx>
Signed-off-by: Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
---
arch/arm64/boot/dts/airoha/en7581.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi
index 77fd37222a6a..f4d41b22e505 100644
--- a/arch/arm64/boot/dts/airoha/en7581.dtsi
+++ b/arch/arm64/boot/dts/airoha/en7581.dtsi
@@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/en7523-clk.h>
+#include <dt-bindings/reset/airoha,en7581-reset.h>
/ {
interrupt-parent = <&gic>;
@@ -158,6 +159,7 @@ scuclk: clock-controller@1fa20000 {
<0x0 0x1fb00000 0x0 0x1000>,
<0x0 0x1fbe3400 0x0 0xfc>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
snfi: spi@1fa10000 {
--
2.45.0
