The original is a string in dts that has no "zfh" or "zvfh" extension, but the K230 chip has them, so I am adding them to the dts. This patch also reordered the Z* extension in the isa string and used canonical order for the category as the first key and then alphabet order as the second key to meet RISC-V ISA Extension Naming Conventions. Signed-off-by: Yangyu Chen <cyy@xxxxxxxxxxxx> --- prerequisite-patchset: https://lore.kernel.org/linux-riscv/tencent_22BA0425B4DF1CA1713B62E4423C1BFBF809@xxxxxx/ --- arch/riscv/boot/dts/canaan/k230.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/riscv/boot/dts/canaan/k230.dtsi b/arch/riscv/boot/dts/canaan/k230.dtsi index 95c1a3d8fb11..104e08ef5869 100644 --- a/arch/riscv/boot/dts/canaan/k230.dtsi +++ b/arch/riscv/boot/dts/canaan/k230.dtsi @@ -24,11 +24,12 @@ cpu@0 { compatible = "thead,c908", "riscv"; device_type = "cpu"; reg = <0>; - riscv,isa = "rv64imafdcv_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_svpbmt"; + riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zba", "zbb", - "zbc", "zbs", "zicbom", "zicbop", "zicboz", - "zicntr", "zicsr", "zifencei", "zihpm", "svpbmt"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", + "zicbop", "zicboz", "zicntr", "zicsr", "zifencei", + "zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh", + "svpbmt"; riscv,cbom-block-size = <64>; riscv,cbop-block-size = <64>; riscv,cboz-block-size = <64>; -- 2.43.0
