On 2024/5/1 4:01, Tomasz Jeznach wrote:
Introduce device driver for PCIe implementation of RISC-V IOMMU architected hardware. IOMMU hardware and system support for MSI or MSI-X is required by this implementation. Vendor and device identifiers used in this patch matches QEMU implementation of the RISC-V IOMMU PCIe device, from Rivos VID (0x1efd) range allocated by the PCI-SIG. MAINTAINERS | added iommu-pci.c already covered by matching pattern. Link:https://lore.kernel.org/qemu-devel/20240307160319.675044-1-dbarboza@xxxxxxxxxxxxxxxx/ Co-developed-by: Nick Kossifidis<mick@xxxxxxxxxxxx> Signed-off-by: Nick Kossifidis<mick@xxxxxxxxxxxx> Signed-off-by: Tomasz Jeznach<tjeznach@xxxxxxxxxxxx> --- drivers/iommu/riscv/Kconfig | 5 ++ drivers/iommu/riscv/Makefile | 1 + drivers/iommu/riscv/iommu-pci.c | 119 ++++++++++++++++++++++++++++++++ 3 files changed, 125 insertions(+) create mode 100644 drivers/iommu/riscv/iommu-pci.c
Reviewed-by: Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx> Best regards, baolu
