On Tue, 30 Apr 2024 at 19:33, Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx> wrote: > > Adding this change to set max link speed to gen4 as sa8775p supports > gen4 so that pcie link can be enumerated as gen4. Previous patches mentioned stability issues. Were they solved? > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 0c52180..aad2cd7 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -3730,7 +3730,7 @@ > power-domains = <&gcc PCIE_0_GDSC>; > phys = <&pcie0_phy>; > phy-names = "pciephy"; > - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */ > + max-link-speed = <4>; > num-lanes = <2>; > > status = "disabled"; > @@ -3888,7 +3888,7 @@ > power-domains = <&gcc PCIE_1_GDSC>; > phys = <&pcie1_phy>; > phy-names = "pciephy"; > - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */ I think you've just sent a patchset which adds this node. Is there any reason for setting the max-link-speed to 3 just to change it to 4 immediately? > + max-link-speed = <4>; > num-lanes = <4>; > > status = "disabled"; > -- > 2.7.4 > > -- With best wishes Dmitry
