Hi Andrew, On 24/04/24 4:44 am, Andrew Lunn wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Thu, Apr 18, 2024 at 06:26:38PM +0530, Parthiban Veerasooran wrote: >> Implement register write operation according to the control communication >> specified in the OPEN Alliance 10BASE-T1x MACPHY Serial Interface >> document. Control write commands are used by the SPI host to write >> registers within the MAC-PHY. Each control write commands are composed of >> a 32 bits control command header followed by register write data. >> >> The MAC-PHY ignores the final 32 bits of data from the SPI host at the >> end of the control write command. The write command and data is also >> echoed from the MAC-PHY back to the SPI host to enable the SPI host to >> identify which register write failed in the case of any bus errors. >> Control write commands can write either a single register or multiple >> consecutive registers. When multiple consecutive registers are written, >> the address is automatically post-incremented by the MAC-PHY. Writing to >> any unimplemented or undefined registers shall be ignored and yield no >> effect. >> >> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@xxxxxxxxxxxxx> > > Apart from the Return: issues: OK. Thanks. Best regards, Parthiban V > > Reviewed-by: Andrew Lunn <andrew@xxxxxxx> > > Andrew >
