On Wed, 24 Apr 2024 17:16:21 +0200, Niklas Cassel wrote: > The DWC core has four interrupt signals: tx_inta, tx_intb, tx_intc, tx_intd > that are triggered when the PCIe controller (when running in Endpoint mode) > has sent an Assert_INTA Message to the upstream device. > > Some DWC controllers have these interrupt in a combined interrupt signal. > > Add the description of these interrupts to the device tree binding. > > Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
