The DWC core has four interrupt signals: tx_inta, tx_intb, tx_intc, tx_intd
that are triggered when the PCIe controller (when running in Endpoint mode)
has sent an Assert_INTA Message to the upstream device.
Some DWC controllers have these interrupt in a combined interrupt signal.
Add the description of these interrupts to the device tree binding.
Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx>
---
Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
index f5f12cbc2cb3..f474b9e3fc7e 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
@@ -151,6 +151,15 @@ properties:
Application-specific IRQ raised depending on the vendor-specific
events basis.
const: app
+ - description:
+ Interrupts triggered when the controller itself (in Endpoint mode)
+ has sent an Assert_INT{A,B,C,D}/Desassert_INT{A,B,C,D} message to
+ the upstream device.
+ pattern: "^tx_int(a|b|c|d)$"
+ - description:
+ Combined interrupt signal raised when the controller has sent an
+ Assert_INT{A,B,C,D} message. See "^tx_int(a|b|c|d)$" for details.
+ const: legacy
- description:
Vendor-specific IRQ names. Consider using the generic names above
for new bindings.
--
2.44.0
