On Tue, 23 Apr 2024 15:31:03 +0100, André Draszik wrote: > Add dt-schema documentation and clock IDs for the high speed interface > 0 HSI0 clock management unit. This is used (amongst others) for USB. > > While the usual (sed) script has been used to derive the linux clock > IDs from the data sheet, one manual tweak was applied to fix a typo > which we don't want to carry: > HSI0_USPDPDBG_USER -> HSI0_USBDPDBG_USER (note USB vs USP). > > Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx> > > --- > Note for future reference: To ensure consistent naming throughout this > driver, the IDs have been derived from the data sheet using the > following, with the expectation for all future additions to this file > to use the same: > sed \ > -e 's|^PLL_LOCKTIME_PLL_\([^_]\+\)|CLK_FOUT_\1_PLL|' \ > \ > -e 's|^PLL_CON0_MUX_CLKCMU_\([^_]\+\)_|CLK_MOUT_\1_|' \ > -e 's|^PLL_CON0_PLL_\(.*\)|CLK_MOUT_PLL_\1|' \ > -e 's|^CLK_CON_MUX_MUX_CLK_\(.*\)|CLK_MOUT_\1|' \ > -e '/^PLL_CON[1-4]_[^_]\+_/d' \ > -e '/^[^_]\+_CMU_[^_]\+_CONTROLLER_OPTION/d' \ > -e '/^CLKOUT_CON_BLK_[^_]\+_CMU_[^_]\+_CLKOUT0/d' \ > \ > -e 's|_IPCLKPORT||' \ > -e 's|_RSTNSYNC||' \ > -e 's|_G4X2_DWC_PCIE_CTL||' \ > -e 's|_G4X1_DWC_PCIE_CTL||' \ > -e 's|_PCIE_SUB_CTRL||' \ > -e 's|_INST_0||g' \ > -e 's|_LN05LPE||' \ > -e 's|_TM_WRAPPER||' \ > -e 's|_SF||' \ > \ > -e 's|^CLK_CON_DIV_DIV_CLK_\([^_]\+\)_|CLK_DOUT_\1_|' \ > \ > -e 's|^CLK_CON_BUF_CLKBUF_\([^_]\+\)_|CLK_GOUT_\1_|' \ > -e 's|^CLK_CON_GAT_CLK_BLK_\([^_]\+\)_UID_|CLK_GOUT_\1_|' \ > -e 's|^CLK_GOUT_[^_]\+_[^_]\+_CMU_\([^_]\+\)_PCLK$|CLK_GOUT_\1_PCLK|' \ > -e 's|^CLK_CON_GAT_GOUT_BLK_\([^_]\+\)_UID_|CLK_GOUT_\1_|' \ > -e 's|^CLK_CON_GAT_CLK_\([^_]\+\)_\(.*\)|CLK_GOUT_\1_CLK_\1_\2|' \ > \ > -e '/^\(DMYQCH\|PCH\|QCH\|QUEUE\)_/d' > --- > .../bindings/clock/google,gs101-clock.yaml | 29 +++++++++++- > include/dt-bindings/clock/google,gs101.h | 54 ++++++++++++++++++++++ > 2 files changed, 81 insertions(+), 2 deletions(-) > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
