On Sat, Apr 20, 2024 at 09:53:42AM -0500, matthew.gerlach@xxxxxxxxxxxxxxx wrote: > From: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx> > > Convert the device tree bindings for the Altera Root Port PCIe controller > from text to YAML. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx> > --- > v4: > - reorder reg-names to match original binding > - move reg and reg-names to top level with limits. > > v3: > - Added years to copyright > - Correct order in file of allOf and unevaluatedProperties > - remove items: in compatible field > - fix reg and reg-names constraints > - replace deprecated pci-bus.yaml with pci-host-bridge.yaml > - fix entries in ranges property > - remove device_type from required > > v2: > - Move allOf: to bottom of file, just like example-schema is showing > - add constraint for reg and reg-names > - remove unneeded device_type > - drop #address-cells and #size-cells > - change minItems to maxItems for interrupts: > - change msi-parent to just "msi-parent: true" > - cleaned up required: > - make subject consistent with other commits coverting to YAML > - s/overt/onvert/g > --- > .../devicetree/bindings/pci/altera-pcie.txt | 50 ----------- > .../bindings/pci/altr,pcie-root-port.yaml | 88 +++++++++++++++++++ > 2 files changed, 88 insertions(+), 50 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pci/altera-pcie.txt > create mode 100644 Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml > > diff --git a/Documentation/devicetree/bindings/pci/altera-pcie.txt b/Documentation/devicetree/bindings/pci/altera-pcie.txt > deleted file mode 100644 > index 816b244a221e..000000000000 > --- a/Documentation/devicetree/bindings/pci/altera-pcie.txt > +++ /dev/null > @@ -1,50 +0,0 @@ > -* Altera PCIe controller > - > -Required properties: > -- compatible : should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0" > -- reg: a list of physical base address and length for TXS and CRA. > - For "altr,pcie-root-port-2.0", additional HIP base address and length. > -- reg-names: must include the following entries: > - "Txs": TX slave port region > - "Cra": Control register access region > - "Hip": Hard IP region (if "altr,pcie-root-port-2.0") > -- interrupts: specifies the interrupt source of the parent interrupt > - controller. The format of the interrupt specifier depends > - on the parent interrupt controller. > -- device_type: must be "pci" > -- #address-cells: set to <3> > -- #size-cells: set to <2> > -- #interrupt-cells: set to <1> > -- ranges: describes the translation of addresses for root ports and > - standard PCI regions. > -- interrupt-map-mask and interrupt-map: standard PCI properties to define the > - mapping of the PCIe interface to interrupt numbers. > - > -Optional properties: > -- msi-parent: Link to the hardware entity that serves as the MSI controller > - for this PCIe controller. > -- bus-range: PCI bus numbers covered > - > -Example > - pcie_0: pcie@c00000000 { > - compatible = "altr,pcie-root-port-1.0"; > - reg = <0xc0000000 0x20000000>, > - <0xff220000 0x00004000>; > - reg-names = "Txs", "Cra"; > - interrupt-parent = <&hps_0_arm_gic_0>; > - interrupts = <0 40 4>; > - interrupt-controller; What happened to this? It is clearly needed since the interrupt-map below points back to this node. Note that that didn't work at one point in time, but I think we fixed it. It doesn't seem you are testing the binding against an actual DT. Please do that. Rob > - #interrupt-cells = <1>; > - bus-range = <0x0 0xFF>; > - device_type = "pci"; > - msi-parent = <&msi_to_gic_gen_0>; > - #address-cells = <3>; > - #size-cells = <2>; > - interrupt-map-mask = <0 0 0 7>; > - interrupt-map = <0 0 0 1 &pcie_0 1>, > - <0 0 0 2 &pcie_0 2>, > - <0 0 0 3 &pcie_0 3>, > - <0 0 0 4 &pcie_0 4>; > - ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000 > - 0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>; > - };