On 22/04/2024 10:46, Steffen Trumtrar wrote: > When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set > to output mode. To do this, the ENET_CLK_SEL register must be accessed. > This register is located in a GPR register space. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx> > --- > Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > index 4c01cae7c93a7..1d1c8b90da871 100644 > --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > @@ -56,6 +56,16 @@ properties: > - tx > - mem > > + enet_clk_sel: Except what Sasha wrote, also missing vendor prefix. That's not a generic property. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to the GPR syscon > + - description: the offset of the GPR register > + description: > + Should be phandle/offset pair. The phandle to the syscon node which > + encompases the GPR register, and the offset of the GPR register. That's redundant. Provide full description in the items. You can say here what is the purpose of this phandle. Best regards, Krzysztof
