Add i2c0 and all devices under it for imx8qm-mek board.
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 50 ++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 9f8d3df00f793..e5740f301bde0 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -96,6 +96,49 @@ &adc0 {
status = "okay";
};
+&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ status = "okay";
+
+ lsm303arg@19 {
+ compatible = "st,lsm303agr-accel";
+ reg = <0x19>;
+ };
+
+ fxas21002c@20 {
+ compatible = "nxp,fxas21002c";
+ reg = <0x20>;
+ };
+
+ isl29023@44 {
+ compatible = "isil,isl29023";
+ reg = <0x44>;
+ interrupt-parent = <&lsio_gpio4>;
+ interrupts = <11 2>;
+ };
+
+ mpl3115@60 {
+ compatible = "fsl,mpl3115";
+ reg = <0x60>;
+ };
+
+ max7322: gpio@68 {
+ compatible = "maxim,max7322";
+ reg = <0x68>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ l3g4250@69 {
+ compatible = "st,l3g4200d-gyro";
+ reg = <0x69>;
+ };
+};
+
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
@@ -283,6 +326,13 @@ IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 0x0600004c
>;
};
+ pinctrl_i2c0: i2c0grp {
+ fsl,pins = <
+ IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x06000021
+ IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0x06000021
+ >;
+ };
+
pinctrl_i2c1: i2c1grp {
fsl,pins = <
IMX8QM_GPT0_CLK_DMA_I2C1_SCL 0x0600004c
--
2.34.1
