On Wed, Apr 03, 2024 at 06:25:54PM +0800, Shawn Sung wrote: > From: "Jason-JH.Lin" <jason-jh.lin@xxxxxxxxxxxx> > > Add mboxes to define a GCE loopping thread as a secure irq handler. > This property is only required if CMDQ secure driver is supported. > > Signed-off-by: Jason-JH.Lin <jason-jh.lin@xxxxxxxxxxxx> > Signed-off-by: Hsiao Chien Sung <shawn.sung@xxxxxxxxxxxx> > --- > .../bindings/mailbox/mediatek,gce-mailbox.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml > index cef9d76013985..c0d80cc770899 100644 > --- a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml > +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml > @@ -49,6 +49,16 @@ properties: > items: > - const: gce > > + mediatek,gce-events: > + description: > + The event id which is mapping to the specific hardware event signal > + to gce. The event id is defined in the gce header > + include/dt-bindings/gce/<chip>-gce.h of each chips. Missing any info here about when this should be used, hint - you have it in the commit message. > + $ref: /schemas/types.yaml#/definitions/uint32-arrayi Why is the ID used by the CMDQ service not fixed for each SoC? Cheers, Conor
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