Re: [PATCH v2] arm64: dts: ti: k3-{am62p,j722s}: Disable ethernet by default

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On 4/3/24 5:15 AM, Michael Walle wrote:
Device tree best practice is to disable any external interface in the
dtsi and just enable them if needed in the device tree. Thus, disable
the ethernet switch and its ports by default and just enable the ones
used by the EVMs in their device trees.

There is no functional change.

Signed-off-by: Michael Walle <mwalle@xxxxxxxxxx>
---

Acked-by: Andrew Davis <afd@xxxxxx>

v2:
  - move the status propert into k3-am62p5-main.dtsi, thus also update
    the k3-am62p5-sk.dts
  - put "status" last
---
  arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 3 +++
  arch/arm64/boot/dts/ti/k3-am62p5-sk.dts   | 3 +++
  arch/arm64/boot/dts/ti/k3-j722s-evm.dts   | 5 +----
  3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 7337a9e13535..88bc64111234 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -673,6 +673,7 @@ cpsw3g: ethernet@8000000 {
  		assigned-clock-parents = <&k3_clks 13 11>;
  		clock-names = "fck";
  		power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
dmas = <&main_pktdma 0xc600 15>,
  		       <&main_pktdma 0xc601 15>,
@@ -696,6 +697,7 @@ cpsw_port1: port@1 {
  				label = "port1";
  				phys = <&phy_gmii_sel 1>;
  				mac-address = [00 00 00 00 00 00];
+				status = "disabled";
  			};
cpsw_port2: port@2 {
@@ -704,6 +706,7 @@ cpsw_port2: port@2 {
  				label = "port2";
  				phys = <&phy_gmii_sel 2>;
  				mac-address = [00 00 00 00 00 00];
+				status = "disabled";
  			};
  		};
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 6694087b3665..6a9c99c5fb2a 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -431,16 +431,19 @@ &cpsw3g {
  	pinctrl-names = "default";
  	pinctrl-0 = <&main_rgmii1_pins_default>,
  		    <&main_rgmii2_pins_default>;
+	status = "okay";
  };
&cpsw_port1 {
  	phy-mode = "rgmii-rxid";
  	phy-handle = <&cpsw3g_phy0>;
+	status = "okay";
  };
&cpsw_port2 {
  	phy-mode = "rgmii-rxid";
  	phy-handle = <&cpsw3g_phy1>;
+	status = "okay";
  };
&cpsw3g_mdio {
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index 6b148da2bcdc..8a38e5ae7d4f 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -226,10 +226,7 @@ cpsw3g_phy0: ethernet-phy@0 {
  &cpsw_port1 {
  	phy-mode = "rgmii-rxid";
  	phy-handle = <&cpsw3g_phy0>;
-};
-
-&cpsw_port2 {
-	status = "disabled";
+	status = "okay";
  };
&main_gpio1 {




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