On Tue, Apr 02, 2024 at 04:27:17PM +0200, Jerome Brunet wrote: > > On Tue 02 Apr 2024 at 15:15, Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxxxxx> wrote: > > > On Tue, Apr 02, 2024 at 11:00:42AM +0200, Jerome Brunet wrote: > >> > >> On Fri 29 Mar 2024 at 23:58, Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxxxxx> wrote: > >> > >> > The 'syspll' PLL, also known as the system PLL, is a general and > >> > essential PLL responsible for generating the CPU clock frequency. > >> > With its wide-ranging capabilities, it is designed to accommodate > >> > frequencies within the range of 768MHz to 1536MHz. > >> > > >> > Signed-off-by: Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxxxxx> > >> > --- > >> > drivers/clk/meson/a1-pll.c | 78 ++++++++++++++++++++++++++++++++++++++ > >> > drivers/clk/meson/a1-pll.h | 6 +++ > >> > 2 files changed, 84 insertions(+) > >> > > >> > diff --git a/drivers/clk/meson/a1-pll.c b/drivers/clk/meson/a1-pll.c > >> > index 60b2e53e7e51..02fd2d325cc6 100644 > >> > --- a/drivers/clk/meson/a1-pll.c > >> > +++ b/drivers/clk/meson/a1-pll.c > >> > @@ -138,6 +138,81 @@ static struct clk_regmap hifi_pll = { > >> > }, > >> > }; > >> > > >> > +static const struct pll_mult_range sys_pll_mult_range = { > >> > + .min = 32, > >> > + .max = 64, > >> > +}; > >> > + > >> > +/* > >> > + * We assume that the sys_pll_clk has already been set up by the low-level > >> > + * bootloaders as the main CPU PLL source. Therefore, it is not necessary to > >> > + * run the initialization sequence. > >> > + */ > >> > >> I see no reason to make such assumption. > >> This clock is no read-only, it apparently is able to re-lock so assuming > >> anything from the bootloader is just asking from trouble > >> > > > > Indeed, I have implemented the following initialization sequence. I have > > dumped the bootloader setup and included it in the definition of my > > sys_pll. However, I have encountered an issue with the enable bit. If I > > leave the enable bit switched on by default, there is a possibility that > > the bootloader selects a fixed CPU clock while the sys_pll should be > > switched off. On the other hand, if I keep the enable bit switched off > > by default, the bootloader might configure the CPU clock to use sys_pll, > > resulting in the execution halting when the initialization sequence is > > run. This situation has led me to assume that we should place our trust > > in the bootloader setup. > > > > If you believe it is necessary to include the initialization sequence, I > > can prepare it with the sys_pll enabled by default. > > I just noted your initial comment is misleading. > > You could submit a patch to apply the init sequence only if the PLL is > not already enabled. Maybe even condition that to flag in the pll data > to avoid applying it to the other platforms for now. > Ah, I see. Okay, no problem, I will prepare such patch to common meson clk-pll. [...] -- Thank you, Dmitry