From: Qingfang Deng <qingfang.deng@xxxxxxxxxxxxxxx> Add YAML devicetree bindings for Siflower Quad SPI controller. Signed-off-by: Qingfang Deng <qingfang.deng@xxxxxxxxxxxxxxx> --- .../bindings/spi/siflower,qspi.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/siflower,qspi.yaml diff --git a/Documentation/devicetree/bindings/spi/siflower,qspi.yaml b/Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file mode 100644 index 000000000000..c2dbe82affc2 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/siflower,qspi.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/siflower,qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Siflower Quad Serial Peripheral Interface (QSPI) + +maintainers: + - Qingfang Deng <qingfang.deng@xxxxxxxxxxxxxxx> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: siflower,qspi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + spi@c200000 { + compatible = "siflower,qspi"; + reg = <0 0xc200000 0 0x1000>; + clocks = <&apb_clk>; + interrupts = <39>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + #address-cells = <1>; + #size-cells = <0>; + }; -- 2.34.1
