On 21/03/2024 17:19, Frank Li wrote: >>> + clocks: >>> + minItems: 3 >>> + maxItems: 4 >>> + >>> + clock-names: >>> + minItems: 3 >>> + description: | >>> + core: The core clock used to access registers. >>> + extal: The esai baud clock for esai controller used to >>> + derive HCK, SCK and FS. >>> + fsys: The system clock derived from ahb clock used to >>> + derive HCK, SCK and FS. >>> + spba: The spba clock is required when ESAI is placed as a >>> + bus slave of the Shared Peripheral Bus and when two >>> + or more bus masters (CPU, DMA or DSP) try to access >>> + it. This property is optional depending on the SoC >>> + design. >> >> This description should be split into each items entry below. Description of clocks goes to clocks. Here, just items with 'const' items. There are plenty of examples for this, most of complex devices define clocks that way. Best regards, Krzysztof
