[PATCH] dt-bindings: spi: convert spi-jcore to dtschema

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Convert existing bindings of J-Core spi2 to dtschema.  No new properties
are added.

Signed-off-by: Kousik Sanagavarapu <five231003@xxxxxxxxx>
---
 .../devicetree/bindings/spi/jcore,spi.txt     | 34 -----------
 .../devicetree/bindings/spi/jcore,spi.yaml    | 60 +++++++++++++++++++
 2 files changed, 60 insertions(+), 34 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txt
 create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.yaml

diff --git a/Documentation/devicetree/bindings/spi/jcore,spi.txt b/Documentation/devicetree/bindings/spi/jcore,spi.txt
deleted file mode 100644
index 93936d16e139..000000000000
--- a/Documentation/devicetree/bindings/spi/jcore,spi.txt
+++ /dev/null
@@ -1,34 +0,0 @@
-J-Core SPI master
-
-Required properties:
-
-- compatible: Must be "jcore,spi2".
-
-- reg: Memory region for registers.
-
-- #address-cells: Must be 1.
-
-- #size-cells: Must be 0.
-
-Optional properties:
-
-- clocks: If a phandle named "ref_clk" is present, SPI clock speed
-  programming is relative to the frequency of the indicated clock.
-  Necessary only if the input clock rate is something other than a
-  fixed 50 MHz.
-
-- clock-names: Clock names, one for each phandle in clocks.
-
-See spi-bus.txt for additional properties not specific to this device.
-
-Example:
-
-spi@40 {
-	compatible = "jcore,spi2";
-	#address-cells = <1>;
-	#size-cells = <0>;
-	reg = <0x40 0x8>;
-	spi-max-frequency = <25000000>;
-	clocks = <&bus_clk>;
-	clock-names = "ref_clk";
-}
diff --git a/Documentation/devicetree/bindings/spi/jcore,spi.yaml b/Documentation/devicetree/bindings/spi/jcore,spi.yaml
new file mode 100644
index 000000000000..e76775bb68d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/jcore,spi.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/spi/jcore,spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: J-Core SPI controller
+
+description: |
+  The J-Core "spi2" device is a PIO-based SPI controller which used to
+  perform byte-at-a-time transfers between the CPU and itself.
+
+maintainers:
+  - Kousik Sanagavarapu <five231003@xxxxxxxxx>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    const: jcore,spi2
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      If a phandle named "ref_clk" is present, SPI clock speed
+      programming is relative to the frequency of the indicated clock.
+      Necessary only if the input clock rate is something other than a
+      fixed 50 MHz.
+
+  clock-names:
+    description:
+      Clock names, one for each phandle in clocks.
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: true
+
+examples:
+  - |
+    spi@40 {
+      compatible = "jcore,spi2";
+      #address-cells = <1>;
+      #size-cells = <0>;
+      reg = <0x40 0x8>;
+      spi-max-frequency = <25000000>;
+      clocks = <&bus_clk>;
+      clock-names = "ref_clk";
+    };
-- 
2.44.0.273.g4bc5b65358.dirty





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