On Fri, Mar 15, 2024 at 06:35:15PM +0100, Neil Armstrong wrote: > On 15/03/2024 18:19, Luca Weiss wrote: > > On Thu Feb 29, 2024 at 2:07 PM CET, Neil Armstrong wrote: > > > Register a typec mux in order to change the PHY mode on the Type-C > > > mux events depending on the mode and the svid when in Altmode setup. > > > > > > The DisplayPort phy should be left enabled if is still powered on > > > by the DRM DisplayPort controller, so bail out until the DisplayPort > > > PHY is not powered off. > > > > > > The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states > > > will be set in between of USB-Only, Combo and DisplayPort Only so > > > this will leave enough time to the DRM DisplayPort controller to > > > turn of the DisplayPort PHY. > > > > > > The patchset also includes bindings changes and DT changes. > > > > > > This has been successfully tested on an SM8550 board, but the > > > Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort, > > > PD USB Hubs and PD Altmode Dongles to make sure the switch works > > > as expected. > > > > > > The DisplayPort 4 lanes setup can be check with: > > > $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug > > > name = msm_dp > > > drm_dp_link > > > rate = 540000 > > > num_lanes = 4 > > > > Hi Neil, > > > > I tried this on QCM6490/SC7280 which should also support 4-lane DP but I > > haven't had any success so far. > > [..] > > [ 1775.563969] [drm:dp_ctrl_link_train] *ERROR* max v_level reached > > [ 1775.564031] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11 > > Interesting #1 means the 4 lanes are not physically connected to the other side, > perhaps QCM6490/SC7280 requires a specific way to enable the 4 lanes in the PHY, > or some fixups in the init tables. > I tested the same on rb3gen2 (qcs6490) a couple of weeks ago, with the same outcome. Looking at the AUX reads, after switching to 4-lane the link training is failing on all 4 lanes, in contrast to succeeding only on the first 2 if you e.g. forget to mux the other two. As such, my expectation is that there's something wrong in the QMP PHY (or possibly redriver) for this platform. Regards, Bjorn
