Quoting Chen Wang (2024-02-19 19:09:18) > From: Chen Wang <unicorn_wang@xxxxxxxxxxx> > > Add bindings for the clock generator of divider/mux and gates working > for other subsystem than RP subsystem for Sophgo SG2042. > > Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx> > --- Applied to clk-next
