Il 07/03/24 20:04, Justin Swartz ha scritto:
Add missing pinctrl-name and pinctrl-0 properties to declare
that the uart1_pins group is associated with serial0.
Signed-off-by: Justin Swartz <justin.swartz@xxxxxxxxxxxxxxxx>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 35a10258f..dca415fdd 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -123,6 +123,9 @@ serial0: serial@c00 {
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
};
spi0: spi@b00 {
The pins are muxed and can be either UART, or some other function that
is supported by the mux: this means that the pinctrl-xxx properties shall
*not* go into the SoC dtsi file, but in board dts files instead.
Said differently: the usage of the UART pins is board-specific, not SoC-wide.
Regards,
Angelo
