Hello, On Thu Feb 29, 2024 at 4:48 PM CET, Andy Shevchenko wrote: > On Thu, Feb 29, 2024 at 04:40:25PM +0100, Théo Lebrun wrote: > > On Thu Feb 29, 2024 at 3:59 PM CET, Andy Shevchenko wrote: > > > On Thu, Feb 29, 2024 at 03:27:01PM +0100, Théo Lebrun wrote: > > > > On Wed, Feb 28, 2024 at 03:33:29PM +0100, Théo Lebrun wrote: > > > > > On Tue Feb 27, 2024 at 6:11 PM CET, Andy Shevchenko wrote: > > > > > > On Tue, Feb 27, 2024 at 03:55:24PM +0100, Théo Lebrun wrote: > > [...] > > > > > > > > > + u32 reg; /* next 8 bytes are r0 and r1 */ > > > > > > > > > > > > > > Not sure this comments gives any clarification to a mere reader of the code. > > > > > > > Perhaps you want to name this as reg64 (at least it will show that you have > > > > > > > 8 bytes, but I have no clue what is the semantic relationship between r0 and > > > > > > > r1, it's quite cryptic to me). Or maybe it should be reg_0_1? > > > > > > > > > > > > Clocks are defined by two 32-bit registers. We only store the first > > > > > > register offset because they always follow each other. > > > > > > > > > > > I like the reg64 name and will remove the comment. This straight forward > > > > > > code is found in the rest of the code, I don't think it is anything > > > > > > hard to understand (ie does not need a comment): > > > > > > > > > > > > u32 r0 = readl(base_plls + pll->reg); > > > > > > u32 r1 = readl(base_plls + pll->reg + sizeof(r0)); > > > > > > > > > > Btw, why readq()/writeq() (with probably the inclusion of io-64-nonatomic-lo-hi.h) > > > > > can be used in this case? It will be much better overall and be aligned with > > > > > reg64 name. > > > > > > > > The doc talks in terms of 32-bit registers. I do not see a reason to > > > > work in 64-bit. If we get a 64-bit value that we need to split we need > > > > to think about the endianness of our platform, which makes things more > > > > complex than just reading both values independently. > > > > > > 1) Would be nice to test on the real HW to confirm it doesn't accept 64-bit IO. > > > > Just tested, it works. No error on the memory bus. And checked assembly > > generated was a single 64-bit instructions. > > > > It might not work on other hardware revisions though. I can't remember > > if memory bus is changing across them. > > > > > 2) Still I see a benefit from using lo_hi_readq() and friends directly. > > > > So it is: > > > > u32 r0 = readl(base_plls + pll->reg64); > > u32 r1 = readl(base_plls + pll->reg64 + sizeof(r0)); > > > > vs: > > > > u64 r = lo_hi_readq(base_plls + pll->regs64); > > > u32 r0 = r; > > u32 r1 = r >> 32; > > It depends to the semantics of these two. How hard do they coupled to each > other semantically? I.o.w. can they always be considered as 64-bit register > with the respective bitfields? (And note FIELD_GET() here is your friend.) OLB (the memory region) has always been described as a list of 32-bit registers. The semantics lean in the camp of two readl(). > > One is straight forward, the other uses an obscure helper that code > > readers must understand and follows that with bit manipulation. > > [...] > > > There are two errors to handle, that makes a mess out of the code. > > Having a little bit of repetition but straight forward code is nicer in > > my opinion. At least we tried! > > Yes! Perhaps you can add a couple of words into commit message to explain > this detail of implementation (that code in two parts is not so identical > to be easily deduplicated). Yes, will do. I get why from a reader's point-of-view it looks like duplicate code. Thanks, -- Théo Lebrun, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
