Hello, On Thu Feb 29, 2024 at 3:59 PM CET, Andy Shevchenko wrote: > On Thu, Feb 29, 2024 at 03:27:01PM +0100, Théo Lebrun wrote: > > On Wed, Feb 28, 2024 at 03:33:29PM +0100, Théo Lebrun wrote: > > > On Tue Feb 27, 2024 at 6:11 PM CET, Andy Shevchenko wrote: > > > > On Tue, Feb 27, 2024 at 03:55:24PM +0100, Théo Lebrun wrote: > > [...] > > > > > > > + u32 reg; /* next 8 bytes are r0 and r1 */ > > > > > > > > > > Not sure this comments gives any clarification to a mere reader of the code. > > > > > Perhaps you want to name this as reg64 (at least it will show that you have > > > > > 8 bytes, but I have no clue what is the semantic relationship between r0 and > > > > > r1, it's quite cryptic to me). Or maybe it should be reg_0_1? > > > > > > > > Clocks are defined by two 32-bit registers. We only store the first > > > > register offset because they always follow each other. > > > > > > > I like the reg64 name and will remove the comment. This straight forward > > > > code is found in the rest of the code, I don't think it is anything > > > > hard to understand (ie does not need a comment): > > > > > > > > u32 r0 = readl(base_plls + pll->reg); > > > > u32 r1 = readl(base_plls + pll->reg + sizeof(r0)); > > > > > > Btw, why readq()/writeq() (with probably the inclusion of io-64-nonatomic-lo-hi.h) > > > can be used in this case? It will be much better overall and be aligned with > > > reg64 name. > > > > The doc talks in terms of 32-bit registers. I do not see a reason to > > work in 64-bit. If we get a 64-bit value that we need to split we need > > to think about the endianness of our platform, which makes things more > > complex than just reading both values independently. > > 1) Would be nice to test on the real HW to confirm it doesn't accept 64-bit IO. Just tested, it works. No error on the memory bus. And checked assembly generated was a single 64-bit instructions. It might not work on other hardware revisions though. I can't remember if memory bus is changing across them. > 2) Still I see a benefit from using lo_hi_readq() and friends directly. So it is: u32 r0 = readl(base_plls + pll->reg64); u32 r1 = readl(base_plls + pll->reg64 + sizeof(r0)); vs: u64 r = lo_hi_readq(base_plls + pll->regs64); u32 r0 = r; u32 r1 = r >> 32; One is straight forward, the other uses an obscure helper that code readers must understand and follows that with bit manipulation. > > [...] > > > > > > I didn't get. If eq5c_init() was finished successfully, why do you need to > > > > > seems repeat what it already done? What did I miss? > > > > > > > > The key here is that eq5c_init() iterates on eq5c_early_plls[] while > > > > eq5c_probe() iterates on eq5c_plls[]. I've tried to hint at this in the > > > > commit message: > > > > > > > > > Two PLLs are required early on and are therefore registered at > > > > > of_clk_init(). Those are pll-cpu for the GIC timer and pll-per for the > > > > > UARTs. > > > > > > > > Doing everything in eq5c_init() is not clean because we expect all new > > > > clock provider drivers to be standard platform drivers. Doing > > > > everything from a platform driver probe doesn't work because some > > > > clocks are required earlier than platform bus init. We therefore do a > > > > mix. > > > > > > Am I missing something or these two pieces are using the same IO resources? > > > This looks like a lot of code duplication without clear benefit. Perhaps > > > you can have a helper? > > > > There are two subtle differences that make creating a helper difficult: > > > > - Logging, pr_*() vs dev_*(). Second option is preferred but only > > available once a device is created. > > Some code uses (yeah, arguable that it's better, but depends on how much > the real deduplication takes) > > if (dev) > dev_*(...); > else > pr_*(...); > > > - Behavior on error: we stop the world for early clocks but keep going > > for normal clocks. > > ...(..., bool skip_errors) > { > ... > } > > (with the same caveat)? I started trying it out, but the combination of both flags means dealing with errors would look like: ret = foo(); if (ret) { if (!skip_errors) { if (dev) dev_err(dev, "..."); else pr_err("..."); return ret; } if (dev) dev_warn(dev, "..."); else pr_warn("..."); } There are two errors to handle, that makes a mess out of the code. Having a little bit of repetition but straight forward code is nicer in my opinion. At least we tried! Regards, -- Théo Lebrun, Bootlin Embedded Linux and Kernel engineering https://bootlin.com