On Thu, Feb 22, 2024 at 11:31:16AM +0100, Jérémie Dautheribes wrote: > The TI DP83826 PHY can operate in either MII mode or RMII mode. > By default, it is configured by straps. > It can also be configured by writing to the bit 5 of register 0x17 - RMII > and Status Register (RCSR). > > When phydev->interface is rmii, rmii mode must be enabled, otherwise > mii mode must be set. > This prevents misconfiguration of hw straps. > > Signed-off-by: Jérémie Dautheribes <jeremie.dautheribes@xxxxxxxxxxx> > --- > drivers/net/phy/dp83822.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c > index 30f2616ab1c2..2d8275e59dcc 100644 > --- a/drivers/net/phy/dp83822.c > +++ b/drivers/net/phy/dp83822.c > @@ -100,6 +100,7 @@ > #define DP83822_WOL_CLR_INDICATION BIT(11) > > /* RCSR bits */ > +#define DP83822_RMII_MODE_EN BIT(5) > #define DP83822_RGMII_MODE_EN BIT(9) > #define DP83822_RX_CLK_SHIFT BIT(12) > #define DP83822_TX_CLK_SHIFT BIT(11) > @@ -500,6 +501,16 @@ static int dp83826_config_init(struct phy_device *phydev) > u16 val, mask; > int ret; > > + if (phydev->interface == PHY_INTERFACE_MODE_RMII) > + ret = phy_set_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, > + DP83822_RMII_MODE_EN); > + else > + ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, > + DP83822_RMII_MODE_EN); I would probably add a test for MII and return -EINVAL if asked to do something else altogether. Andrew
