On 2/20/24 18:06, Vladimir Oltean wrote: > On Tue, Feb 20, 2024 at 05:52:36PM -0500, Sean Anderson wrote: >> With SGMII and XFI, the PCS sits on the MAC's MDIO bus. So for SGMII and >> XFI if we don't have any labels we can just assume the PCS handle is for >> the right PCS. But for QSGMII the PCSs sit on another MAC's MDIO bus. So >> we need to tell the MAC where to find the PCS. This means we need to >> supply multiple PCSs to the MAC > > So how did the other Layerscape devices with the same SerDes, PCS and > mEMAC manage to get by and support QSGMII without listing all possible > PCSes in pcs-handle-names? :-/ DPAA2 has the exact same situation with > the QSGMII PCS situated on the internal bus of another DPMAC. I'm not familiar with them. With DPAA we used to just try to configure the QSGMII PCSs on every MAC's MDIO bus. This worked out since if you enabled all the MACs, the right one would eventually configure the PCSs. But it also meant you couldn't determine the link status (since you didn't know where your PCS was). > It is unnecessary and buggy complexity, and it will only have to become > worse when I add support for C73 backplane autoneg in lynx-pcs and the > fman_memac driver, because I will need yet another PCS handle, this time > not even one that represents a phy-mode in particular, but a PCS handle > for C73 (with C73, the autoneg process determines the dynamic phy-mode). There are multiple physical PCSs there must also be multiple PCS devices. Otherwise your software and hardware will get out of sync. If you don't want the complexity, then don't design hardware with multiple PCSs connected to the same MAC. --Sean [Embedded World 2024, SECO SpA]<https://www.messe-ticket.de/Nuernberg/embeddedworld2024/Register/ew24517689>
