> It's not MAC which behaves wrongly, it's the MDIO bus. If we don't follow > the reset procedure properly. The MDIO bus fails to respond to any > write/read commands. But i believe MAC controller and PHY are still working. > I recalled that it can still transfer network packets, though it fails to > read PHY registers from MDIO bus so only 10Mbps is available (And the phy id > read out is always 0x0, normally it's 0x20669853). > > Maybe during initialization, PHY sent some garbage to MDIO bus and killed > it. MDIO bus masters are really simple things, not much more than a shift register. I find it hard to believe the MDIO bus master breaks because of reset order. If the MDIO pins went to SoC pins, it would be simple to prove, a bus-pirate or similar can capture the signals and sigrok can decode MDIO. To me, its more likely the PHY side of the MDIO bus is broken somehow. Andrew
