From: Yang Xiwen <forbidden405@xxxxxxxxxxx>
It is accessed by direct MMIO, making "ranges" property mandatory for
it. Also there is an extra clock for the phy.
Signed-off-by: Yang Xiwen <forbidden405@xxxxxxxxxxx>
---
.../bindings/phy/hisilicon,inno-usb2-phy.yaml | 32 ++++++++++++++++++++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
index 1b57e0396209..969fd3fb7537 100644
--- a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
@@ -15,6 +15,7 @@ properties:
- enum:
- hisilicon,hi3798cv200-usb2-phy
- hisilicon,hi3798mv100-usb2-phy
+ - hisilicon,hi3798mv200-usb2-phy
- const: hisilicon,inno-usb2-phy
reg:
@@ -23,18 +24,27 @@ properties:
peripheral controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC,
or direct MMIO address space.
+ ranges:
+ maxItems: 1
+
'#address-cells':
const: 1
'#size-cells':
- const: 0
+ enum: [0, 1]
clocks:
maxItems: 1
description: reference clock
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+
+ reset-names:
+ items:
+ - const: port
+ - const: test
patternProperties:
'phy@[0-9a-f]+':
@@ -54,6 +64,9 @@ patternProperties:
resets:
maxItems: 1
+ phy_type:
+ const: utmi
+
required:
- reg
- '#phy-cells'
@@ -67,6 +80,21 @@ required:
- '#size-cells'
- resets
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: hisilicon,hi3798mv200-usb2-phy
+ then:
+ required:
+ - ranges
+ - reset-names
+ else:
+ properties:
+ ranges: false
+ reset-names: false
+
additionalProperties: false
examples:
--
2.43.0
