This driver has never been used in the DT files merged to the kernel.
According to Sibi, it only worked on the pre-production devices. For the
production devices this functionality has been moved to the firmware.
Drop the driver to remove possible confusion.
Cc: Sibi Sankar <quic_sibis@xxxxxxxxxxx>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
drivers/clk/qcom/Kconfig | 10 ---
drivers/clk/qcom/Makefile | 1 -
drivers/clk/qcom/mss-sc7180.c | 140 ------------------------------------------
3 files changed, 151 deletions(-)
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 4580edbd13ea..8ab08e7b5b6c 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -635,16 +635,6 @@ config SC_LPASS_CORECC_7280
Say Y if you want to use LPASS clocks and power domains of the LPASS
core clock controller.
-config SC_MSS_7180
- tristate "SC7180 Modem Clock Controller"
- depends on ARM64 || COMPILE_TEST
- select SC_GCC_7180
- help
- Support for the Modem Subsystem clock controller on Qualcomm
- Technologies, Inc on SC7180 devices.
- Say Y if you want to use the Modem branch clocks of the Modem
- subsystem clock controller to reset the MSS subsystem.
-
config SC_VIDEOCC_7180
tristate "SC7180 Video Clock Controller"
depends on ARM64 || COMPILE_TEST
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 1da65ca78e24..dec5b6db6860 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -91,7 +91,6 @@ obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o
obj-$(CONFIG_SC_LPASSCC_8280XP) += lpasscc-sc8280xp.o
obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o
obj-$(CONFIG_SC_LPASS_CORECC_7280) += lpasscorecc-sc7280.o lpassaudiocc-sc7280.o
-obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o
obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o
obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o
obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o
diff --git a/drivers/clk/qcom/mss-sc7180.c b/drivers/clk/qcom/mss-sc7180.c
deleted file mode 100644
index d106bc65470e..000000000000
--- a/drivers/clk/qcom/mss-sc7180.c
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2020, The Linux Foundation. All rights reserved.
- */
-
-#include <linux/clk-provider.h>
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/pm_clock.h>
-#include <linux/pm_runtime.h>
-#include <linux/regmap.h>
-
-#include <dt-bindings/clock/qcom,mss-sc7180.h>
-
-#include "clk-regmap.h"
-#include "clk-branch.h"
-#include "common.h"
-
-static struct clk_branch mss_axi_nav_clk = {
- .halt_reg = 0x20bc,
- .halt_check = BRANCH_HALT,
- .clkr = {
- .enable_reg = 0x20bc,
- .enable_mask = BIT(0),
- .hw.init = &(struct clk_init_data){
- .name = "mss_axi_nav_clk",
- .parent_data = &(const struct clk_parent_data){
- .fw_name = "gcc_mss_nav_axi",
- },
- .num_parents = 1,
- .ops = &clk_branch2_ops,
- },
- },
-};
-
-static struct clk_branch mss_axi_crypto_clk = {
- .halt_reg = 0x20cc,
- .halt_check = BRANCH_HALT,
- .clkr = {
- .enable_reg = 0x20cc,
- .enable_mask = BIT(0),
- .hw.init = &(struct clk_init_data){
- .name = "mss_axi_crypto_clk",
- .parent_data = &(const struct clk_parent_data){
- .fw_name = "gcc_mss_mfab_axis",
- },
- .num_parents = 1,
- .ops = &clk_branch2_ops,
- },
- },
-};
-
-static const struct regmap_config mss_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .fast_io = true,
- .max_register = 0x41aa0cc,
-};
-
-static struct clk_regmap *mss_sc7180_clocks[] = {
- [MSS_AXI_CRYPTO_CLK] = &mss_axi_crypto_clk.clkr,
- [MSS_AXI_NAV_CLK] = &mss_axi_nav_clk.clkr,
-};
-
-static const struct qcom_cc_desc mss_sc7180_desc = {
- .config = &mss_regmap_config,
- .clks = mss_sc7180_clocks,
- .num_clks = ARRAY_SIZE(mss_sc7180_clocks),
-};
-
-static int mss_sc7180_probe(struct platform_device *pdev)
-{
- int ret;
-
- ret = devm_pm_runtime_enable(&pdev->dev);
- if (ret)
- return ret;
-
- ret = devm_pm_clk_create(&pdev->dev);
- if (ret)
- return ret;
-
- ret = pm_clk_add(&pdev->dev, "cfg_ahb");
- if (ret < 0) {
- dev_err(&pdev->dev, "failed to acquire iface clock\n");
- return ret;
- }
-
- ret = pm_runtime_resume_and_get(&pdev->dev);
- if (ret)
- return ret;
-
- ret = qcom_cc_probe(pdev, &mss_sc7180_desc);
- if (ret < 0)
- goto err_put_rpm;
-
- pm_runtime_put(&pdev->dev);
-
- return 0;
-
-err_put_rpm:
- pm_runtime_put_sync(&pdev->dev);
-
- return ret;
-}
-
-static const struct dev_pm_ops mss_sc7180_pm_ops = {
- SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
-};
-
-static const struct of_device_id mss_sc7180_match_table[] = {
- { .compatible = "qcom,sc7180-mss" },
- { }
-};
-MODULE_DEVICE_TABLE(of, mss_sc7180_match_table);
-
-static struct platform_driver mss_sc7180_driver = {
- .probe = mss_sc7180_probe,
- .driver = {
- .name = "sc7180-mss",
- .of_match_table = mss_sc7180_match_table,
- .pm = &mss_sc7180_pm_ops,
- },
-};
-
-static int __init mss_sc7180_init(void)
-{
- return platform_driver_register(&mss_sc7180_driver);
-}
-subsys_initcall(mss_sc7180_init);
-
-static void __exit mss_sc7180_exit(void)
-{
- platform_driver_unregister(&mss_sc7180_driver);
-}
-module_exit(mss_sc7180_exit);
-
-MODULE_DESCRIPTION("QTI MSS SC7180 Driver");
-MODULE_LICENSE("GPL v2");
--
2.39.2
