Add a Tegra132 compatible string to the pinmux IP blocks present on chips similar to Tegra124. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Signed-off-by: Paul Walmsley <paul@xxxxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: Pawel Moll <pawel.moll@xxxxxxx> Cc: Mark Rutland <mark.rutland@xxxxxxx> Cc: Ian Campbell <ijc+devicetree@xxxxxxxxxxxxxx> Cc: Kumar Gala <galak@xxxxxxxxxxxxxx> Cc: Stephen Warren <swarren@xxxxxxxxxxxxx> Cc: Thierry Reding <thierry.reding@xxxxxxxxx> Cc: Alexandre Courbot <gnurou@xxxxxxxxx> Cc: Sean Paul <seanpaul@xxxxxxxxxxxx> Cc: Linus Walleij <linus.walleij@xxxxxxxxxx> Cc: Paul Walmsley <pwalmsley@xxxxxxxxxx> Cc: devicetree@xxxxxxxxxxxxxxx Cc: linux-tegra@xxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx --- .../bindings/pinctrl/nvidia,tegra124-pinmux.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt index 189814e7cdc7..4eb7163a2eb8 100644 --- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt @@ -7,6 +7,7 @@ a baseline, and only documents the differences between the two bindings. Required properties: - compatible: "nvidia,tegra124-pinmux" + "nvidia,tegra132-pinmux" (not yet matched in the driver) - reg: Should contain a list of base address and size pairs for: -- first entry - the drive strength and pad control registers. -- second entry - the pinmux registers -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html