On Sun, 11 Feb 2024 16:17:39 +0800
Jisheng Zhang <jszhang@xxxxxxxxxx> wrote:
Hi Jisheng,
thanks for the changes, and for spotting the 5V/3.3V issue yourself,
which I missed. This looks good to me now.
> The Sipeed Longan SoM 3H is a system on module based on the Allwinner
> H618 SoC. The SoM features:
>
> - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
> - 2/4 GiB LPDDR4 DRAM SoMs
> - AXP313a PMIC
> - eMMC
>
> The Sipeed Longan PI 3H is a development board based on the above SoM.
> The board features:
> - Longan SoM 3H
> - Raspberry-Pi-1 compatible GPIO header
> - 2 USB 2.0 host port
> - 1 USB 2.0 type C port (power supply + OTG)
> - MicroSD slot
> - 1Gbps Ethernet port (via RTL8211 PHY)
> - HDMI port
> - WiFi/BT chip
>
> Add the devicetree file describing the currently supported features,
> namely PMIC, LEDs, UART, SD card, eMMC, USB and Ethernet.
>
> Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>
Cheers,
Andre
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../sun50i-h618-longan-module-3h.dtsi | 75 +++++++++
> .../dts/allwinner/sun50i-h618-longanpi-3h.dts | 144 ++++++++++++++++++
> 3 files changed, 220 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 91d505b385de..4b9173a16efe 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -42,5 +42,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi
> new file mode 100644
> index 000000000000..8c1263a3939e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) Jisheng Zhang <jszhang@xxxxxxxxxx>
> + */
> +
> +#include "sun50i-h616.dtsi"
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_pins>;
> + vmmc-supply = <®_dldo1>;
> + vqmmc-supply = <®_aldo1>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + status = "okay";
> +};
> +
> +&r_i2c {
> + status = "okay";
> +
> + axp313: pmic@36 {
> + compatible = "x-powers,axp313a";
> + reg = <0x36>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + regulators {
> + reg_aldo1: aldo1 {
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc-1v8-pll";
> + };
> +
> + reg_dldo1: dldo1 {
> + regulator-always-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-3v3-io";
> + };
> +
> + reg_dcdc1: dcdc1 {
> + regulator-always-on;
> + regulator-min-microvolt = <810000>;
> + regulator-max-microvolt = <990000>;
> + regulator-name = "vdd-gpu-sys";
> + };
> +
> + reg_dcdc2: dcdc2 {
> + regulator-always-on;
> + regulator-min-microvolt = <810000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-name = "vdd-cpu";
> + };
> +
> + reg_dcdc3: dcdc3 {
> + regulator-always-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-name = "vdd-dram";
> + };
> + };
> + };
> +};
> +
> +&pio {
> + vcc-pc-supply = <®_dldo1>;
> + vcc-pf-supply = <®_dldo1>;
> + vcc-pg-supply = <®_aldo1>;
> + vcc-ph-supply = <®_dldo1>;
> + vcc-pi-supply = <®_dldo1>;
> +};
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts
> new file mode 100644
> index 000000000000..18b29c6b867f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts
> @@ -0,0 +1,144 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) Jisheng Zhang <jszhang@xxxxxxxxxx>
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-h618-longan-module-3h.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/leds/common.h>
> +
> +/ {
> + model = "Sipeed Longan Pi 3H";
> + compatible = "sipeed,longan-pi-3h", "sipeed,longan-module-3h", "allwinner,sun50i-h618";
> +
> + aliases {
> + ethernet0 = &emac0;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + color = <LED_COLOR_ID_ORANGE>;
> + function = LED_FUNCTION_INDICATOR;
> + function-enumerator = <0>;
> + gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */
> + };
> +
> + led-1 {
> + color = <LED_COLOR_ID_ORANGE>;
> + function = LED_FUNCTION_INDICATOR;
> + function-enumerator = <1>;
> + gpios = <&pio 6 4 GPIO_ACTIVE_LOW>; /* PG4 */
> + };
> + };
> +
> + reg_vcc5v: regulator-vcc5v {
> + /* board wide 5V supply directly from the USB-C socket */
> + compatible = "regulator-fixed";
> + regulator-name = "vcc-5v";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + };
> +
> + reg_vcc3v3: regulator-vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + vin-supply = <®_vcc5v>;
> + };
> +};
> +
> +&axp313 {
> + vin1-supply = <®_vcc5v>;
> + vin2-supply = <®_vcc5v>;
> + vin3-supply = <®_vcc5v>;
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&ehci2 {
> + status = "okay";
> +};
> +
> +&ohci2 {
> + status = "okay";
> +};
> +
> +/* WiFi & BT combo module is connected to this Host */
> +&ehci3 {
> + status = "okay";
> +};
> +
> +&ohci3 {
> + status = "okay";
> +};
> +
> +&emac0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&ext_rgmii_pins>;
> + phy-mode = "rgmii";
> + phy-handle = <&ext_rgmii_phy>;
> + allwinner,rx-delay-ps = <3100>;
> + allwinner,tx-delay-ps = <700>;
> + phy-supply = <®_vcc3v3>;
> + status = "okay";
> +};
> +
> +&mdio0 {
> + ext_rgmii_phy: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
> +};
> +
> +&mmc0 {
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
> + vmmc-supply = <®_vcc3v3>;
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&usbotg {
> + /*
> + * PHY0 pins are connected to a USB-C socket, but a role switch
> + * is not implemented: both CC pins are pulled to GND.
> + * The VBUS pins power the device, so a fixed peripheral mode
> + * is the best choice.
> + * The board can be powered via GPIOs, in this case port0 *can*
> + * act as a host (with a cable/adapter ignoring CC), as VBUS is
> + * then provided by the GPIOs. Any user of this setup would
> + * need to adjust the DT accordingly: dr_mode set to "host",
> + * enabling OHCI0 and EHCI0.
> + */
> + dr_mode = "peripheral";
> + status = "okay";
> +};
> +
> +&usbphy {
> + usb1_vbus-supply = <®_vcc5v>;
> + usb2_vbus-supply = <®_vcc5v>;
> + status = "okay";
> +};
