Since commit 8208181fe536 ("clk: imx: composite-8m:
Add imx8m_divider_determine_rate") the lcdif controller has
had the ability to set the disp_pixel_clk rate which propagates
up the tree and sets the video_pll rate automatically.
As such, there is no need to define it in the board file.
Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts
index 35b8d2060cd9..bbd80896db96 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts
@@ -99,8 +99,6 @@ adv7535_out: endpoint {
};
&lcdif {
- assigned-clocks = <&clk IMX8MN_VIDEO_PLL1>;
- assigned-clock-rates = <594000000>;
status = "okay";
};
--
2.43.0
