From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Update CPG #power-domain-cells = <1> and move all the IPs to be part of the
always on power domain as the driver has been modified to support multiple
power domains.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 28 +++++++++++-----------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
index 50ed66d42a24..74af0f730b89 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
@@ -81,7 +81,7 @@ sdhi0: mmc@85000000 {
<&cpg CPG_MOD R9A09G011_SDI0_ACLK>;
clock-names = "core", "clkh", "cd", "aclk";
resets = <&cpg R9A09G011_SDI0_IXRST>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -97,7 +97,7 @@ sdhi1: mmc@85010000 {
<&cpg CPG_MOD R9A09G011_SDI1_ACLK>;
clock-names = "core", "clkh", "cd", "aclk";
resets = <&cpg R9A09G011_SDI1_IXRST>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -113,7 +113,7 @@ emmc: mmc@85020000 {
<&cpg CPG_MOD R9A09G011_EMM_ACLK>;
clock-names = "core", "clkh", "cd", "aclk";
resets = <&cpg R9A09G011_EMM_IXRST>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -129,7 +129,7 @@ usb3drd: usb3drd@85070400 {
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
clock-names = "axi", "reg";
resets = <&cpg R9A09G011_USB_DRD_RESET>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
ranges;
#address-cells = <2>;
#size-cells = <2>;
@@ -144,7 +144,7 @@ usb3host: usb@85060000 {
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
clock-names = "axi", "reg";
resets = <&cpg R9A09G011_USB_ARESETN_H>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -157,7 +157,7 @@ usb3peri: usb3peri@85070000 {
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
clock-names = "axi", "reg";
resets = <&cpg R9A09G011_USB_ARESETN_P>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
};
@@ -207,7 +207,7 @@ avb: ethernet@a3300000 {
<&cpg CPG_MOD R9A09G011_ETH0_GPTP_EXT>;
clock-names = "axi", "chi", "gptp";
resets = <&cpg R9A09G011_ETH0_RST_HW_N>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -220,7 +220,7 @@ cpg: clock-controller@a3500000 {
clock-names = "extal";
#clock-cells = <2>;
#reset-cells = <1>;
- #power-domain-cells = <0>;
+ #power-domain-cells = <1>;
};
pwc: pwc@a3700000 {
@@ -244,7 +244,7 @@ csi0: spi@a4020000 {
<&cpg CPG_MOD R9A09G011_CPERI_GRPG_PCLK>;
clock-names = "csiclk", "pclk";
resets = <&cpg R9A09G011_CSI_GPG_PRESETN>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -258,7 +258,7 @@ csi4: spi@a4020200 {
<&cpg CPG_MOD R9A09G011_CPERI_GRPH_PCLK>;
clock-names = "csiclk", "pclk";
resets = <&cpg R9A09G011_CSI_GPH_PRESETN>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -274,7 +274,7 @@ i2c0: i2c@a4030000 {
interrupt-names = "tia", "tis";
clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>;
resets = <&cpg R9A09G011_IIC_GPA_PRESETN>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -288,7 +288,7 @@ i2c2: i2c@a4030100 {
interrupt-names = "tia", "tis";
clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK1>;
resets = <&cpg R9A09G011_IIC_GPB_PRESETN>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -311,7 +311,7 @@ wdt0: watchdog@a4050000 {
clock-names = "pclk", "oscclk";
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cpg R9A09G011_WDT0_PRESETN>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -361,7 +361,7 @@ pinctrl: pinctrl@b6250000 {
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD R9A09G011_PFC_PCLK>;
- power-domains = <&cpg>;
+ power-domains = <&cpg R9A09G011_PD_ALWAYS_ON>;
resets = <&cpg R9A09G011_PFC_PRESETN>;
};
};
--
2.39.2
