From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> Hi, Series adds support for power domains on rzg2l driver. RZ/G2L kind of devices support a functionality called MSTOP (module stop/standby). According to hardware manual the module could be switch to standby after its clocks are disabled. The reverse order of operation should be done when enabling a module (get the module out of standby, enable its clocks etc). In [1] the MSTOP settings were implemented by adding code in driver to attach the MSTOP state to the IP clocks. But it has been proposed to implement it as power domain. The result is this series. Along with MSTOP functionality there is also module power down functionality (which is currently available only on RZ/G3S). This has been also implemented through power domains. The DT bindings were updated with power domain IDs (plain integers that matches the DT with driver data structures). The current DT bindings were updated with module IDs for the modules listed in tables with name "Registers for Module Standby Mode" (see HW manual) exception being RZ/G3S where, due to the power down functionality, the DDR, TZCDDR, OTFDE_DDR were also added, to avoid system being blocked due to the following lines of code from patch 7/17. + /* Prepare for power down the BUSes in power down mode. */ + if (info->pm_domain_pwrdn_mstop) + writel(CPG_PWRDN_MSTOP_ENABLE, priv->base + CPG_PWRDN_MSTOP); Domain IDs were added to all SoC specific bindings to avoid breaking dt schema validation failures. If the proposed dt-binding update is good for you, please let me know if you want me to also update the individual dt schemas to reflect the newly introduced power domain IDs in schema examples, if any. Thank you, Claudiu Beznea [1] https://lore.kernel.org/all/20231120070024.4079344-4-claudiu.beznea.uj@xxxxxxxxxxxxxx/ Claudiu Beznea (17): dt-bindings: clock: r9a07g043-cpg: Add power domain IDs dt-bindings: clock: r9a07g044-cpg: Add power domain IDs dt-bindings: clock: r9a07g054-cpg: Add power domain IDs dt-bindings: clock: r9a08g045-cpg: Add power domain IDs dt-bindings: clock: r9a09g011-cpg: Add always-on power domain IDs dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> clk: renesas: rzg2l: Extend power domain support clk: renesas: r9a07g043: Add initial support for power domains clk: renesas: r9a07g044: Add initial support for power domains clk: renesas: r9a08g045: Add support for power domains clk: renesas: r9a09g011: Add initial support for power domains arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags arm64: dts: renesas: r9a07g043: Update #power-domain-cells = <1> arm64: dts: renesas: r9a07g044: Update #power-domain-cells = <1> arm64: dts: renesas: r9a07g054: Update #power-domain-cells = <1> arm64: dts: renesas: r9a08g045: Update #power-domain-cells = <1> arm64: dts: renesas: r9a09g011: Update #power-domain-cells = <1> .../bindings/clock/renesas,rzg2l-cpg.yaml | 4 +- arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 84 +++---- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 6 +- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 100 ++++---- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 100 ++++---- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 20 +- arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 28 +-- .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 4 + arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 2 +- drivers/clk/renesas/r9a07g043-cpg.c | 9 + drivers/clk/renesas/r9a07g044-cpg.c | 13 + drivers/clk/renesas/r9a08g045-cpg.c | 27 +++ drivers/clk/renesas/r9a09g011-cpg.c | 9 + drivers/clk/renesas/rzg2l-cpg.c | 227 ++++++++++++++++-- drivers/clk/renesas/rzg2l-cpg.h | 68 ++++++ include/dt-bindings/clock/r9a07g043-cpg.h | 48 ++++ include/dt-bindings/clock/r9a07g044-cpg.h | 58 +++++ include/dt-bindings/clock/r9a07g054-cpg.h | 58 +++++ include/dt-bindings/clock/r9a08g045-cpg.h | 70 ++++++ include/dt-bindings/clock/r9a09g011-cpg.h | 3 + 20 files changed, 752 insertions(+), 186 deletions(-) -- 2.39.2
