Hi, Rob, On 31.01.2024 00:25, Rob Herring wrote: > On Thu, Jan 25, 2024 at 07:01:10PM +0000, Tudor Ambarus wrote: >> >> >> On 1/25/24 17:45, Mark Brown wrote: >>> On Thu, Jan 25, 2024 at 05:30:53PM +0000, Tudor Ambarus wrote: >>>> On 1/25/24 17:26, Mark Brown wrote: >>> >>>>> OK, so just the compatible is enough information then? >>> >>>> For gs101, yes. All the gs101 SPI instances are configured with 64 bytes >>>> FIFO depths. So instead of specifying the FIFO depth for each SPI node, >>>> we can infer the FIFO depth from the compatible. >>> >>> But this is needed for other SoCs? This change is scattered through a >> >> There are SoCs that have multiple instances of the SPI IP, and they >> configure them with different FIFO depths. See >> "samsung,exynosautov9-spi" for example: SPI0, SPI1, and SPI6 are >> configured by the SoC to use 256 bytes FIFO depths, while all the other >> 8 SPI instances use 64 bytes FIFOs. I tried to explain the entire logic >> of the series in another reply, see it here: >> https://lore.kernel.org/linux-arm-kernel/40ba9481-4aea-4a72-87bd-c2db319be069@xxxxxxxxxx/T/#u > > We have some common properties for fifo size. In fact, there was just a > discussion recently on Samsung UART (Is that the same block?) about It is the same block, I'll take a look. > this. So if you do use a property here, use a common one. Will do. Thanks, Rob! Cheers, ta
