On Fri, 2024-02-02 at 09:21 +0100, Krzysztof Kozlowski wrote: > > External email : Please do not click links or open attachments until > you have verified the sender or the content. > On 01/02/2024 22:52, Daniel Golle wrote: > > Add bindings for the MediaTek XFI T-PHY Ethernet SerDes PHY found > in the > > MediaTek MT7988 SoC which can operate at various interfaces modes: > > > > via USXGMII PCS: > > * USXGMII > > * 10GBase-R > > * 5GBase-R > > > > via LynxI SGMII PCS: > > * 2500Base-X > > * 1000Base-X > > * Cisco SGMII (MAC side) > > > > Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx> > > --- > > .../bindings/phy/mediatek,xfi-tphy.yaml | 80 > +++++++++++++++++++ > > 1 file changed, 80 insertions(+) > > create mode 100644 > Documentation/devicetree/bindings/phy/mediatek,xfi-tphy.yaml > > > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,xfi- > tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xfi- > tphy.yaml > > new file mode 100644 > > index 0000000000000..e897118dcf7e6 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/mediatek,xfi-tphy.yaml > > @@ -0,0 +1,80 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/mediatek,xfi-tphy.yaml# > > Please use compatible as filename. Your binding says only one is > possible (const, not enum), so there is no reasoning for different > filename. > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MediaTek XFI T-PHY > > + > > +maintainers: > > + - Daniel Golle <daniel@xxxxxxxxxxxxxx> > > + > > +description: > > + The MediaTek XFI SerDes T-PHY provides the physical SerDes lanes > > + used by the (10G/5G) USXGMII PCS and (1G/2.5G) LynxI PCS found > in > > + MediaTek's 10G-capabale SoCs. > > + > > +properties: > > + $nodename: > > + pattern: "^phy@[0-9a-f]+$" > > No need for nodename in individual bindings file. > > > + > > + compatible: > > + const: mediatek,mt7988-xfi-tphy Add a generic compatible "mediatek,xfi-tphy"? Other socs also use this phy but not upstream. > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: XFI PHY clock > > + - description: XFI register clock > > + > > + clock-names: > > + items: > > + - const: xfipll > > + - const: topxtal > > + > > + resets: > > + items: > > + - description: PEXTP reset > > + > > + mediatek,usxgmii-performance-errata: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: > > + One instance of the T-PHY on MT7988 suffers from a > performance > > + problem in 10GBase-R mode which needs a work-around in the > driver. > > Can you explain what is this issue and errata about (except > performance)? > > > + The work-around is enabled using this flag. > > + > > + "#phy-cells": > > + const: 0 > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - clock-names > > + - resets > > + - "#phy-cells" > > + > > +additionalProperties: false > > > Best regards, > Krzysztof >
