Hi Prabhakar,
On Mon, Jan 29, 2024 at 4:16 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add the IRQC node to RZ/Five (R9A07G043F) SoC DTSI.
Thanks for your patch!
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> @@ -50,6 +50,82 @@ &soc {
> dma-noncoherent;
> interrupt-parent = <&plic>;
>
> + irqc: interrupt-controller@110a0000 {
> + compatible = "renesas,r9a07g043f-irqc",
> + "renesas,rzg2l-irqc";
> + reg = <0 0x110a0000 0 0x20000>;
> + #interrupt-cells = <2>;
> + #address-cells = <0>;
> + interrupt-controller;
> + interrupts = <SOC_PERIPHERAL_IRQ(0) IRQ_TYPE_LEVEL_HIGH>,
As this is the RZ/Five-specific .dtsi file, and not the common base
.dtsi, you could avoid using SOC_PERIPHERAL_IRQ() here.
I am not sure what is most readable...
The rest LGTM (pending interrupt names review comments).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
