On 1/29/24 17:46, André Draszik wrote: > CMU_PERIC1 is the clock management unit used for the peric1 block which > is used for additional USI, I3C and PWM interfaces/busses. Add support > for muxes, dividers and gates of cmu_peric1, except for > CLK_GOUT_PERIC1_IP which isn't well described in the datasheet and > which downstream also ignores (similar to cmu_peric0). > > Two clocks have been marked as CLK_IS_CRITICAL for the following > reason: > * disabling them makes it impossible to access any peric1 > registers, (including those two registers). > * disabling gout_peric1_lhm_axi_p_peric1_i_clk sometimes has the > additional effect of making the whole system unresponsive. > > One clock marked as CLK_IGNORE_UNUSED needs to be kept on until we have > updated the respective driver for the following reason: > * gout_peric1_gpio_peric1_pclk is required by the pinctrl > configuration. With this clock disabled, reconfiguring the pins > (for USI/I2C, USI/UART) will hang during register access. > Since pinctrl-samsung doesn't support a clock at the moment, we > just keep the kernel from disabling it at boot, until we have an > update for pinctrl-samsung, at which point we'll drop the flag. > > Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx> > Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > Reviewed-by: Peter Griffin <peter.griffin@xxxxxxxxxx> > Looks good to me: Reviewed-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxx>
