Re: [PATCH v8 7/7] clk: rockchip: implement proper GATE_LINK support

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On 1/26/24 21:18, Sebastian Reichel wrote:
> Recent Rockchip SoCs have a new hardware block called Native Interface
> Unit (NIU), which gates clocks to devices behind them. These effectively
> need two parent clocks.
> 
> GATE_LINK type clocks handle the second parent via 'linkedclk' by using
> runtime PM clocks. To make that possible a new platform device is created
> for every clock handled in this way.
> 
> Note, that before this patch clk_rk3588_probe() has never been called,
> because CLK_OF_DECLARE marks the DT node as processed. This patch replaces
> that with CLK_OF_DECLARE_DRIVER and thus the probe function is used now.
> This is necessary to have 'struct device' available.
> 
> Also instead of builtin_platform_driver_probe, the driver has been
> switched to use core_initcall, since it should be fully probed before
> the Rockchip PM domain driver (and that is using postcore_initcall).

Why clk driver needs to be fully probed before PD? The PD driver
shouldn't probe until all clk providers that it uses are registered, and
then both clk and PD should be registered at the default level.

-- 
Best regards,
Dmitry





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