- Add dt-bindings - i.MX95 ELE/V2X use same register layout as i.MX8ULP S4 MU, but the TR/RR num is different. To make code reusable and not add too much macros, add runtime detect number of TR and RR by reading PAR_OFF registers. - Add i.MX95 ELE/V2X MU entry in driver Signed-off-by: Peng Fan <peng.fan@xxxxxxx> --- Changes in v5: - Per Conor, add restriction to sram property. - Since i.MX95 MU has SRAM, we may not see it is compatible with i.MX8ULP MU, so drop the fallback compatible - Add R-b for patch 2&3 - Link to v4: https://lore.kernel.org/r/20240125-imx-mailbox-v4-0-800be5383c20@xxxxxxx Changes in v4: - Address dt-binding comments in V2 from Krzysztof - Link to v3: https://lore.kernel.org/r/20240123-imx-mailbox-v3-0-ed932945e0bf@xxxxxxx Changes in v3: - Following dts coding style Per Krzysztof - Add return type for init function, patch 2 is new - Check return value when tr/rr is larger than 4 and return error. - Link to v2: https://lore.kernel.org/r/20240122-imx-mailbox-v2-0-7b3c80333b92@xxxxxxx Changes in v2: - Support sram property and add example - Populate the sram node in driver - Link to v1: https://lore.kernel.org/r/20240122-imx-mailbox-v1-0-81413f655210@xxxxxxx --- Peng Fan (4): dt-bindings: mailbox: fsl,mu: add i.MX95 Generic/ELE/V2X MU compatible mailbox: imx: support return value of init mailbox: imx: get RR/TR registers num from Parameter register mailbox: imx: support i.MX95 ELE/V2X MU .../devicetree/bindings/mailbox/fsl,mu.yaml | 58 +++++++++++++- drivers/mailbox/imx-mailbox.c | 88 ++++++++++++++++------ 2 files changed, 123 insertions(+), 23 deletions(-) --- base-commit: ad5c60d66016e544c51ed98635a74073f761f45d change-id: 20240122-imx-mailbox-243021d12030 Best regards, -- Peng Fan <peng.fan@xxxxxxx>
