On 20/01/2024 02:29, Sam Protsenko wrote: > Some USI blocks can be configured as SPI controllers. Add corresponding > SPI nodes to Exynos850 SoC device tree. > > Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > --- > arch/arm64/boot/dts/exynos/exynos850.dtsi | 54 +++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi > index cd0a452cd6b4..e35973a254e6 100644 > --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi > @@ -738,6 +738,24 @@ usi_spi_0: usi@139400c0 { > <&cmu_peri CLK_GOUT_SPI0_IPCLK>; > clock-names = "pclk", "ipclk"; > status = "disabled"; > + > + spi_0: spi@13940000 { > + compatible = "samsung,exynos850-spi"; > + reg = <0x13940000 0x30>; > + interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_pins>; pinctrl-0 pinctrl-names Same in other places. Best regards, Krzysztof