Re: [PATCH v2] dts: rockpro64: Remove usb regulator-always-on

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On 2024-01-04 10:44, Shantur Rathore wrote:
On Fri, Dec 29, 2023 at 10:08 PM Heiko Stübner <heiko@xxxxxxxxx> wrote:
Am Freitag, 22. Dezember 2023, 15:16:16 CET schrieb Shantur Rathore:
> USB port regulators should be controlled by PHYs
> so we remove always-on property and let PHYs manage the
> regulator.
>
> phy-supply isn't sconfugred for the TypeC port and now that we are
                ^^ configured ?

> removing regulator-always-on, we need to fix the phy-supply
> so the PHYs are able to turn power to type-c port.
>
> Series-version: 2
>
> Signed-off-by: Shantur Rathore <i@xxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
> index bca2b50e0a..f7273f7990 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
> @@ -192,7 +192,6 @@ vcc5v0_host: vcc5v0-host-regulator {
>               pinctrl-names = "default";
>               pinctrl-0 = <&vcc5v0_host_en>;
>               regulator-name = "vcc5v0_host";
> -             regulator-always-on;
>               vin-supply = <&vcc5v0_usb>;
>       };
>
> @@ -203,7 +202,6 @@ vcc5v0_typec: vcc5v0-typec-regulator {
>               pinctrl-names = "default";
>               pinctrl-0 = <&vcc5v0_typec_en>;
>               regulator-name = "vcc5v0_typec";
> -             regulator-always-on;
>               vin-supply = <&vcc5v0_usb>;
>       };
>
> @@ -859,6 +857,7 @@ &u2phy0 {
>       status = "okay";
>
>       u2phy0_otg: otg-port {
> +             phy-supply = <&vcc5v0_typec>;
>               status = "okay";
>       };

Just to explain for me, what is supplying the "other" OTG port
        u2phy1_otg: otg-port {}

in u2phy1 ... this one is status okay, but does not have any phy
supply?

In RockPro64 there is only 1 USB-C OTG port and the other port
is a USB-3.0 port.
To be honest, I am not 100% sure how this all works, as I understand
the USB3.0 port is wired to the second TypeC Phy.

Maybe Dragan has more info on this.

I'll have it checked and tested in detail, of course, but I have to recover from this nasty flu first. Unfortunately, it has rendeded me unable to even think straight.




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