> On Thursday 15 January 2015 08:12:51 wstephen@xxxxxxxxxxxxxx wrote: >> >> The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x >> SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The >> main purpose of these NSS cores is to offload the networking stack from >> the ARM cores to achieve high performance at routing/ipsec..etc without >> exhausting the ARM core CPU cycles. There is another nss-drv driver for >> the NSS cores. > > I see. > >> The nss-gmac driver is designed to work standalone or with the nss-drv >> driver so the switchable data plane overlay was implemented. When it >> worked standalone, the data plane is running on the ARM core as a >> standard >> networking driver. > > How do you decide which way it gets used on a particular system? > By default the GMAC driver uses a native (Host ARM CPU) based data plane. If the configuration loads the offload nss-drv driver, the offload driver registers an overlay with the GMAC. >> The nss-drv driver can take over the data plane and >> offload it to the NSS cores. The STMicro stmmac driver does not have >> this >> kind of overlay design so is not suitable for IPQ806x. This is why we >> don't based on the stmmac driver > > Which kind of offload is implemented specifically? 'data plane' sounds > fairly generic and could mean anything, and the code isn't readable enough > in its current form for me to find out. The Network Subsystem (NSS core) provides a GMAC pass-through until it is given a rule to offload work. Once a rule is given, it is capable of performing: bridging, IPv4 NAT/FWD, IPv6 NAT/FWD, IPSec, LAG, and other protocols. > > Arnd > Hope this clarify your question! Thanks, Stephen -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
