Add the pin muxing and GPIO settings for SCL/SDA for i2c1.
Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
---
arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
index e6e40747d5b9..a68f567010f2 100644
--- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
@@ -30,8 +30,11 @@ qspi-reset-hog {
};
&i2c1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
+ pinctrl-1 = <&pinctrl_i2c1_recovery>;
+ scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
clock-frequency = <100000>;
status = "okay";
@@ -168,6 +171,12 @@ pinctrl_i2c1: i2c1grp {
<MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078>;
};
+ pinctrl_i2c1_recovery: i2c1recoverygrp {
+ fsl,pins =
+ <MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x40000078>,
+ <MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x40000078>;
+ };
+
pinctrl_pmic1: pmic1grp {
fsl,pins =
<MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C>;
--
2.34.1
