PCIE_DIS & PCIE_RST (correctly named W_DISABLE# & PERST#) affect USB devices as well. So hog them to make USB devices attached to Mini PCIe connector available, despite PCIe being disabled. Supply voltages are enabled unconditionally. Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> --- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 28 ++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index 34adf76b713e..8f2f3898d9d1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -46,9 +46,25 @@ ethphy2_0: ethernet-phy@0 { }; }; +&gpio2 { + pcie-dis-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pcie-dis"; + }; + + pcie-rst-hog { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pcie-rst"; + }; +}; + &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog_mba7_1>; + pinctrl-0 = <&pinctrl_hog_mba7_1>, <&pinctrl_hog_pcie>; pinctrl_enet2: enet2grp { fsl,pins = @@ -76,15 +92,19 @@ pinctrl_enet2_phy: enet2phygrp { <MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x40000078>; }; - pinctrl_pcie: pciegrp { + pinctrl_hog_pcie: hogpciegrp { fsl,pins = - /* #pcie_wake */ - <MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x70>, /* #pcie_rst */ <MX7D_PAD_SD2_CLK__GPIO5_IO12 0x70>, /* #pcie_dis */ <MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x70>; }; + + pinctrl_pcie: pciegrp { + fsl,pins = + /* #pcie_wake */ + <MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x70>; + }; }; &iomuxc_lpsr { -- 2.34.1