Quoting Shubhrajyoti Datta (2023-12-14 02:51:25) > Add support for Clocking Wizard for Versal adaptive compute > acceleration platforms. The Versal clocking wizard differs > in the programming model and the register layout. > The CLKFBOUT_1 registers are at offset of 0x200 > instead of the 0x330 in Versal. In Versal clocking wizard the low and > high time is programmed instead of the divisor. > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx> > > --- Applied to clk-next