Re: [PATCH v2 4/5] dt-bindings/perf: Add Arm CoreSight PMU

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On 15/12/2023 9:44 am, Krzysztof Kozlowski wrote:
On 14/12/2023 17:31, Robin Murphy wrote:
+
+  reg:
+    items:
+      - description: Register page 0
+      - description: Register page 1, if the PMU implements the dual-page extension
+    minItems: 1
+
+  interrupts:
+    items:
+      - description: Overflow interrupt
+
+  cpus:
+    description: If the PMU is associated with a particular CPU or subset of CPUs, array of phandles to those CPUs
+
+  reg-io-width:
+    description: Granularity at which PMU register accesses are single-copy atomic
+    default: 4
+    enum: [4, 8]
+
+

If there is going to be new posting: just one blank line

Ack, I've fixed that up locally along with the linewrap (since Will's already winding down for holidays, I'm assuming I'll resend this for 6.9 in the new year now).

+required:
+  - compatible
+  - reg
+
+additionalProperties: false

Why no example to validate the binding?

IMO for such a trivial binding built out of common properties, an equally trivial example isn't going to add any value, since it won't do anything more than re-state the individual property definitions above. In bindings where we have conditional relationships between properties, or complex encodings where a practical example can help explain a definition (e.g. a map/mask pair for a set of input values), then absolutely, an example can add something more to help the author and/or users. But otherwise, the thing I've really grown to like about schema is how thoroughly self-describing the definitions themselves can now be.

Thanks,
Robin.




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