Am Donnerstag, 14. Dezember 2023, 17:07:27 CET schrieb Krzysztof Kozlowski: > On 14/12/2023 16:22, Alex Bee wrote: > > > > Am 14.12.23 um 08:53 schrieb Krzysztof Kozlowski: > >> On 13/12/2023 20:51, Alex Bee wrote: > >>> Document the compatible for RK3128's HDMI controller block. > >>> The integration for this SoC is somewhat different here: It needs the PHY's > >> Please wrap commit message according to Linux coding style / submission > >> process (neither too early nor over the limit): > >> https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > > OK. Not sure why checkpatch --strict didn't tell me that I'm over the > > limit here. > >> > >>> reference clock rate to calculate the ddc bus frequency correctly. This > >>> clock is part of a power-domain (PD_VIO), so this gets added as an optional > >>> property too. > >> If clock is part of power domain, then the power domain must be in the > >> clock controller, not here. So either you put power domain in wrong > >> place or you used incorrect reason for a change. > > Rockchip defines it's powerdomains per clock and I was little to much > > in that world when writing this. Actually the controller itself is part > > of the powerdomain. Will rephrase. > > Does it mean you have like 200 different power domains in one SoC? Then > how are they different than clock if there is one-to-one mapping? It's more like the other way around. Controllers and their clocks belong to specific power-domains. So there are of course more clocks than domains.
