Document the compatible for RK3128's HDMI controller block.
The integration for this SoC is somewhat different here: It needs the PHY's
reference clock rate to calculate the ddc bus frequency correctly. This
clock is part of a power-domain (PD_VIO), so this gets added as an optional
property too.
Signed-off-by: Alex Bee <knaerzche@xxxxxxxxx>
---
.../display/rockchip/rockchip,inno-hdmi.yaml | 30 +++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml
index 96889c86849a..9f00abcbfb38 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml
@@ -14,6 +14,7 @@ properties:
compatible:
enum:
- rockchip,rk3036-inno-hdmi
+ - rockchip,rk3128-inno-hdmi
reg:
maxItems: 1
@@ -22,10 +23,21 @@ properties:
maxItems: 1
clocks:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: The HDMI controller main clock
+ - description: The HDMI PHY reference clock
clock-names:
- const: pclk
+ minItems: 1
+ items:
+ - const: pclk
+ - enum:
+ - pclk
+ - ref
+
+ power-domains:
+ maxItems: 1
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -55,6 +67,20 @@ required:
- pinctrl-names
- ports
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3128-inno-hdmi
+
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ minItems: 2
+
additionalProperties: false
examples:
--
2.43.0
