Re: [PATCH 0/3] Enable myphy28lp support

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Hi,

On 01/16/2015 02:19 PM, Kishon Vijay Abraham I wrote:
Hi,

On Friday 16 January 2015 06:02 PM, Maxime Coquelin wrote:
On 01/16/2015 12:56 PM, Maxime Coquelin wrote:
Hi Gabriel,

     For the series:
Acked-by: Maxime Coquelin <maxime.coquelin@xxxxxx>

     Kishon, could you take care of adding PHY driver patch for v3.20?
Hi Kishon,

     Don't apply the patch, since we have 2 other PHY driver patches, I will
send you a pull request.
Send me as patches if that is okay.
Ok. Just sent the patches.

Thanks,
Maxime

Thanks
Kishon

Best regards,
Maxime


Thanks,
Maxime
On 01/14/2015 10:54 AM, Gabriel FERNANDEZ wrote:
The goal of this series is to enable the support of MiPHY28lp Generic PHY.

The first patch is to update miphy28lp phy driver to access sysconfig register
offsets via syscfg dt property. It's based on Arnds review comments here
https://lkml.org/lkml/2014/11/13/161
I have updated the miphy28lp phy driver same way as Peter's implementation.

Gabriel Fernandez (3):
    phy: miphy28lp: Pass sysconfig register offsets via syscfg dt
      property.
    ARM: DT: STi: STiH407: Add DT node for MiPHY28lp
    ARM: multi_v7_defconfig: Enable MiPHY28lp - ST's Generic (SATA, PCIe &
      USB3) PHY

   .../devicetree/bindings/phy/phy-miphy28lp.txt      | 43 ++++++---------
   arch/arm/boot/dts/stih407-family.dtsi              | 53 +++++++++++++++++++
   arch/arm/boot/dts/stihxxx-b2120.dtsi               | 11 ++++
   arch/arm/configs/multi_v7_defconfig                |  1 +
   drivers/phy/phy-miphy28lp.c                        | 61
++++++++++++----------
   5 files changed, 113 insertions(+), 56 deletions(-)


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