On 08/12/2023 17:39, Emil Renner Berthing wrote: > Sia Jee Heng wrote: >> Add SYSCRG/SYSCRG-NE/SYSCRG-NW/SYSCRG-SW/AONCRG clock and reset >> nodes for JH8100 RISC-V SoC. >> >> Signed-off-by: Sia Jee Heng <jeeheng.sia@xxxxxxxxxxxxxxxx> >> Reviewed-by: Ley Foon Tan <leyfoon.tan@xxxxxxxxxxxxxxxx> >> --- >> arch/riscv/boot/dts/starfive/jh8100-clk.dtsi | 180 +++++++++++++++++++ >> arch/riscv/boot/dts/starfive/jh8100.dtsi | 115 ++++++++++++ > > Why the split here? I mean why can't the clocks just be in the jh8100.dtsi? There should be. What's the point? Clocks are internal part of SoC and not really re-usable piece of hardware. Best regards, Krzysztof
